Introduction to DDR2 RAM Including Its History and Specs
If you want to get some information about Double Data Rate 2 Synchronous Dynamic Random-Access Memory (DDR2 RAM), then you are in the right place. In this post, MiniTool will tell you what DDR2 RAM is and its history as well as specs.
You can find different types of RAM in the market, such as SRAM memory and DRAM memory. And this post focuses on DDR2 SDRAM, but if you want to get some information about other types of RAM, it is recommended to visit the MiniTool website.
Definition of DDR2 RAM
DDR2 SDRAM is short for Double Data Rate 2 Synchronous Dynamic Random-Access Memory, which can also be called DDR2 RAM. It replaced the original DDR SDRAM but it is replaced by DDR3 SDRAM. But DDR2 DIMMs are neither forward compatible with DDR3 nor backward compatible with DDR.
DDR2 RAM can not only double-pump the data bus (transfer data on the rising and falling edges of the bus clock signal) but also increase the bus speed and reduce power consumption by running the internal clock at half the speed of the data bus. The combination of these two factors results in a total of four data transfers per internal clock cycle.
Because the DDR2 internal clock runs at half the DDR external clock rate, the DDR2 memory runs at the same external data bus clock rate as DDR, allowing DDR2 RAM to provide the same bandwidth but with better latency.
In other words, DDR2 RAM running at twice the external data bus clock rate of DDR can provide twice the bandwidth with the same latency. The speed of the best DDR2 memory module is at least twice that of the best DDR memory module.
History of DDR2 RAM
In 2001, Samsung produced the first DDR2 RAM. In 2003, the JEDEC standards organization awarded Samsung the Technology Recognition Award in recognition of the company’s efforts in developing and standardizing DDR2 RAM.
In the second quarter of 2003, DDR2 RAM was officially launched at two initial clock rates: 200 MHz (called PC2-3200) and 266 MHz (PC2-4200). Due to the higher latency, both performances were worse than the original DDR specification, which made the total access time longer.
However, the highest clock rate of the original DDR technology is about 200 MHz (400 MT/s). There are higher-performance DDR chips, but JEDEC said they will not standardize them. Most of these chips are standard DDR chips, which have been tested and determined by the manufacturer to be able to run at higher clock rates
Such a chip consumes much more power than a chip with a slow clock, but usually, there is almost no improvement in actual performance. With the advent of modules with lower latency, DDR2 RAM began to compete with the old DDR standard at the end of 2004.
Specs of DDR2 RAM
The main difference between DDR2 RAM and DDR RAM is the increase in prefetch length. In DDR RAM, the prefetch length was two bits per bit in a word, while it was 4 bits in DDR2 RAM. During the access, the four-bit deep prefetch queue was read or written with four bits.
The queue received or transmitted its data through the data bus on two data bus clock cycles (two data bits were transmitted per clock cycle). The increase in prefetch length allowed DDR2 RAM to double the rate at which data was transferred through the data bus without increasing the data transfer rate. The design of DDR2 RAM avoided an excessive increase in power consumption.
Improvements in electrical interfaces, on-chip termination, prefetch buffers, and off-chip drivers have increased the bus frequency of DDR2 RAM. Nevertheless, as a trade-off factor, the latency of DDR2 RAM will greatly increase.
The depth of the DDR2 prefetch buffer is 4 bits, and the depth of DDR is 2 bits. Although the typical read latency of DDR SDRAM is 2 to 3 bus cycles, the read latency of DDR2 may be 3 to 9 cycles. However, the typical range is 4 to 6. Therefore, DDR2 RAM must run at twice the data rate to achieve the same latency.
Another cost of increasing bandwidth is the requirement to package the chip in a BGA package that is more expensive and difficult to assemble than previous memory generation TSSOP packages (such as DDR SDRAM and SDR SDRAM). To maintain signal integrity at higher bus speeds, this packaging change must be made.
The power saving is mainly achieved due to the improvement of the manufacturing process by reducing the chip area, which leads to a decrease in the operating voltage (compared to the 2.5 V of DDR, which is 1.8 V). The lower memory clock frequency also reduces power consumption in applications that do not require the highest available data rate.
The End
To sum up, this post is mainly talking about DDR2 RAM. After reading this post, you should know its definition, history as well as its specifications.